Precision Ceramic Amplifiers: Budget Finite Loop Gain Before Tightening Resistor Tolerance

System boundary

A linear noninverting operational-amplifier stage with a ceramic feedback resistor network. Other topologies require their own signal and noise-gain definitions.

Integration interfaces

Integration risks

Write the feedback relationship before assigning an error

Define a noninverting stage with input Vin at the positive input, feedback resistor Rf from output to the negative input, and resistor Rg from that negative input to the reference ground. Assume negligible input current, a stable linear amplifier and a low-impedance reference. The feedback fraction beta is Rg divided by Rf plus Rg. These assumptions identify the circuit being calculated.

For this stage, the ideal closed-loop gain Gideal is one over beta. A real amplifier with finite positive DC open-loop gain A instead follows Vout = A times (Vin minus beta Vout). Rearranging gives Gactual = A divided by (1 plus A beta). The difference is present even when Rf and Rg have exactly their intended values; it is not evidence of an incorrectly printed network.

Convert loop gain into a relative gain deficit

Divide the actual gain by the ideal gain to obtain A beta divided by (1 plus A beta). Therefore the relative deficit below ideal is 1 divided by (1 plus A beta). The commonly used reciprocal-loop-gain estimate is close only when loop gain is large. Keep the exact expression when deciding whether an error allowance is met.

In this DC model A and beta are dimensionless, positive and evaluated for the same operating condition. The result is a fraction of the intended gain, not an input offset voltage. An offset produces another output term and needs a separate allocation. Likewise, signal clipping invalidates the linear gain equation rather than merely adding a larger instance of this small-signal error.

Compare the active contribution with the resistor budget

Assume an ideal gain of 100 and an amplifier open-loop gain of 100,000 at the stated load. Then beta is 0.01, loop gain is 1,000, and actual gain is approximately 99.9001. The deficit is about 999.0 parts per million. A hypothetical 100 ppm allocation for resistor-related gain variation is substantially smaller than that uncorrected active contribution.

Increasing the assumed open-loop gain to 1,000,000 while retaining the network raises loop gain to 10,000 and reduces the deficit to about 99.99 ppm. These numbers are invented design inputs for a calculation, not amplifier ratings or achievable network tolerances. They show which parameter must be justified by the component selection and which belongs to the printed resistor drawing.

Derive a requirement from the allowable contribution

If the finite-gain contribution is allocated at most epsilon as a fraction of ideal gain, require A beta to be at least (1 divided by epsilon) minus one. For an assumed allocation of 200 ppm, epsilon is 0.0002 and the required loop gain is at least 4,999. At beta 0.01, the corresponding A is at least 499,900.

Use this inequality as a circuit-selection input, not as a guarantee obtained by reading a typical graph. Review whether the available amplifier data supports the needed gain at the actual load, output level, supply and temperature. Keep margin for other errors rather than silently allocating the entire system tolerance to one mechanism. If no defensible bound is available, identify the required verification instead of assigning an unsupported number.

Do not confuse calibration with stability

A network adjustment can raise the ideal resistor-defined gain enough to compensate a finite-gain deficit at one condition. For example, to obtain actual gain 100 with assumed A equal to 100,000, solving the exact equation gives beta equal to 0.00999. This corresponds to an ideal gain of approximately 100.1001 rather than exactly 100.

Now hold that adjusted beta fixed and let A fall to 50,000 in an assumed changed operating condition. The actual gain becomes approximately 99.9001, about 999 ppm below the calibrated target. The resistor values did not change. This example explains why a successful room-condition trim does not prove gain stability under another load or temperature, and why the adjustment condition must remain traceable.

Use a controlled gain matrix to localize the change

Measure gain from several input-output pairs within the linear range rather than dividing one output by one near-zero input. The slope separates gain from a constant output offset. Keep the source and measurement references consistent, and verify output headroom before accepting a fitted slope. An instrument loading change can otherwise resemble a change in the amplifier under test.

Repeat the slope measurement under the relevant output loads and thermal conditions, holding the printed network configuration unchanged. Compare the pattern with the amplifier's supported behavior and independent resistor measurements. A load-dependent gain change does not by itself identify finite open-loop gain, but it is a reason to investigate the active stage before ordering a new resistor ratio. Preserve raw pairs and measurement uncertainty for that attribution.

Keep AC error and stability separate from the DC deficit

At frequency, open-loop gain generally has phase as well as magnitude. Replace the scalar A with its complex transfer function and evaluate the complete loop. Substituting only its magnitude into the positive DC deficit equation can give a misleading result because the denominator is a complex sum. Frequency-dependent gain error is not necessarily a simple positive percentage shortfall.

The same feedback network also interacts with amplifier stability and parasitic capacitance. Lowering ideal gain to increase the DC loop gain is not universally safe for an amplifier that requires a minimum stable gain. Review the selected device and actual load before changing the architecture. The existing headroom, slew-rate and capacitive-load checks remain separate requirements; none is replaced by this finite-gain calculation.

Specify the resistor and amplifier contributions separately

Provide the ceramic network drawing with the desired signal gain, feedback fraction, connected amplifier, supply and output load. State the resistor-ratio error allocation separately from finite amplifier gain, offset and dynamic behavior. Include whether adjustment is performed on the passive network alone or on an assembled active circuit, because those acceptance measurements answer different questions.

ChipSimple can review the drawing-defined resistor network and its role in the supplied circuit. The equipment designer establishes amplifier selection and complete operating-envelope validation. Revisit the error budget when gain distribution, amplifier, load or calibration condition changes, even if the printed geometry remains unchanged. That separation prevents an active-circuit limitation from being hidden inside an unexplained resistor trim target.