Precision Rectifier Networks: Separate Zero-Crossing Loss from Resistor Gain Error

System boundary

A low-level alternating sensor signal, precision rectifier containing a printed resistor network, active amplifiers and switching diodes or equivalent circuitry, followed by an averaging or acquisition stage. The example is a signal rectifier, not a mains power rectifier.

Integration interfaces

Integration risks

Identify the feedback state on each half cycle

A conventional precision rectifier changes which conduction and feedback paths are active as the input changes sign. For each state, draw the conducting path and derive the corresponding gain. Label the intermediate amplifier output as well as the final rectified output. A final voltage close to zero does not establish that every internal amplifier is in its linear operating region.

A printed resistor network may participate in an inverter, a summing stage or a difference stage depending on the selected topology. Do not transfer resistor ratios between those circuits without deriving their functions. During the polarity transition, the active circuitry must establish its new state. Static matching and that transition are distinct requirements, even when both affect the same reported magnitude.

Keep positive and negative gains as separate measurements

Represent an idealized full-wave output as gplus times the input when it is positive, and minus gminus times the input when it is negative. Both gains are positive magnitudes. Unity absolute-value conversion requires both gains to equal one. Measuring a single positive DC point establishes neither the negative gain nor the transition between them.

For a sinusoidal input with peak amplitude A, the average rectified output under this static model is A times the sum of the two gains divided by pi. That sum can be correct while the gains are individually wrong. An averaging instrument may therefore conceal alternating peak errors. Inspect the two half cycles before deciding that a correct average proves adequate resistor matching.

Expose a gain mismatch that the mean cannot show

Assume a 1 volt peak sine input, gplus of 1.002 and gminus of 0.998. The positive-input half produces a 1.002 volt peak; the negative-input half produces a 0.998 volt peak. Their average is still approximately 0.63662 volt because the gain sum is exactly two. The correct mean does not make the four millivolt alternating peak difference disappear.

This example is a diagnostic construction, not a network tolerance specification. A circuit with both gains at 1.002 would instead raise the mean by 0.2 percent. Record the polarity gains and their relevant resistor relationships before making a trim. A shared adjustment that improves the average may leave the difference between polarities unchanged or make one peak less accurate.

Inspect the transition before assigning it to resistance

At a zero crossing, a diode-based precision rectifier may require an internal output to move between different feedback conditions. Depending on topology, the amplifier can also need to recover from an overloaded state. Diode behaviour, available drive and amplifier recovery influence the resulting waveform. A wider small-signal bandwidth alone does not prove that this state change is harmless.

Capture the input crossing and the rectified output on a common timebase at the required amplitude and load. Preserve the input sign so alternate transitions can be compared. If the observed loss occupies a time interval that changes with frequency, amplitude or polarity, do not immediately interpret it as a constant resistor-ratio error. Compare that signature with the two static gains already measured.

Translate a defined recovery interval into average error

For a deliberately simplified model, assume the output is zero for a fixed time td immediately after every input zero crossing, then follows the ideal absolute sine without any other error. Let delta equal two pi f td, with delta less than pi. There are two missing leading segments per complete input period. Integrating their sine areas gives a fractional loss of (1 minus cos delta) divided by two relative to the ideal rectified mean.

At 10 kilohertz with td of 2 microseconds, delta is approximately 0.12566 radian and the predicted mean loss is about 0.3943 percent. At 1 kilohertz with the same assumed interval, it is about 0.003948 percent. These numbers apply only to the stated missing-segment model. Real transitions can overshoot, recover gradually or differ by polarity, requiring integration of the measured error waveform.

Measure the error that the downstream circuit actually sees

Construct the ideal absolute waveform from the measured input using the intended gain, align acquisition timing and subtract the measured rectifier output. Integrate that error over complete periods to assess its contribution to a mean-reading channel. Keep signed area as well as peak error: a narrow overshoot may offset a missing area numerically while still violating another downstream requirement.

Do not call the result a universal RMS accuracy. An ideal rectified mean and true RMS are different operations. Their conversion factor depends on waveform shape; a sine-calibrated factor does not apply automatically to pulses or distorted signals. Specify whether the customer needs average absolute value, peak, envelope or RMS before setting the acceptance calculation and choosing the downstream filter.

Test amplitude and frequency independently

Use a small matrix of amplitudes and frequencies selected from the actual sensor envelope. Include the lowest useful signal, where offsets and near-zero behaviour can dominate, and the highest permitted signal, where internal range limits may become important. Verify delivered input and load conditions rather than relying only on generator settings.

A static polarity-gain error should be identifiable away from the crossings under linear conditions. A recovery-related error often changes with the time available per half cycle. Keep those observations separate from clipping, ordinary slew limitation and source distortion. If a topology change is considered, repeat both static and transition measurements; eliminating one conduction mechanism does not automatically establish every other circuit limit.

Send a polarity-specific network requirement

Provide ChipSimple with the rectifier schematic, the gain equations for both input signs and the physical resistor identities involved. Include required ratio stability, allowed passive error and the voltage conditions used for resistance acceptance. Supply representative input and rectified waveforms if the enquiry concerns alternating peaks or a frequency-dependent reading.

Keep active-device selection, crossover recovery and final magnitude calculation assigned to the customer’s circuit validation team. The printed network can be reviewed against its defined passive role without promising a rectification bandwidth or system accuracy from resistance alone. The combined deliverable is two correct static gains plus demonstrated waveform behaviour where the application uses them.