Voltage-Divider ADC Inputs: Allocate Quantization Before Tightening Resistor Tolerance

System boundary

External voltage, printed divider, connected ADC input and firmware reconstruction form one measurement chain. Printed ratio precision does not by itself establish digital resolution or complete accuracy.

Integration interfaces

Integration risks

Define the analog quantity represented by the digital code

Identify the external input voltage, divider output and ADC input reference. For a settled ideal divider, let k be the output-to-input voltage ratio. A positive k smaller than one reduces the external signal before conversion. Include actual buffering or loading in the transfer used for the final calculation; the nominal printed ratio alone may not equal the connected circuit transfer.

Obtain the converter's input span, coding format and transition definitions for the selected mode. A bipolar differential converter, an offset-coded converter and a unipolar single-ended converter need different mappings. Do not assume that the largest unsigned code represents an exact analog voltage at the supply rail. The reference and actual transfer definition, not the package's digital supply, establish the conversion range.

Refer one code interval through the divider

For an ideal uniformly spaced N-bit converter spanning F volts, one analog code width is qADC = F divided by two to the power N. With the stated linear divider ratio k, the corresponding external-input width is qIN = qADC divided by k. F and both code widths are in volts, while k and the code count are dimensionless.

This nominal width is a resolution scale, not a complete accuracy guarantee. Real transition locations include offset, gain and nonlinearity, and some codes can have different widths. Keep those specifications separate. The common ideal half-code quantization bound also depends on how an output value is reconstructed from its bin; it should not be added to a raw code as though the code were already a continuous measurement.

Calculate a transparent input-referred example

Assume a hypothetical ideal 12-bit unipolar ADC with a 2.5 V span and a divider ratio of 0.1. The ADC code width is approximately 0.61035 mV and the external-input width is approximately 6.10352 mV. The corresponding nominal external span is 25 V. These are analysis inputs, not a selected converter or a promised divider capability.

For this example only, define code c by a floor-encoding rule: c is the integer part of the ADC input divided by its code width, away from clipping. Code 1638 then represents external voltages from approximately 9.99756 V inclusive to 10.00366 V exclusive. Reporting the bin midpoint gives approximately 10.00061 V with a half-width of 3.05176 mV under this ideal convention. A different real converter transition convention must be implemented as specified.

Compare ratio error at the actual operating voltage

At a 10 V external input, an illustrative divider ratio error of 0.1 percent creates approximately 10 mV of input-referred scale error when nominal ratio is used for conversion. That is larger than the 6.10352 mV code width in the example. Reducing the ratio error to 0.01 percent reduces this contribution to approximately 1 mV, below the ideal half-code width.

The comparison does not mean resistor precision below one code is always wasted. Calibration, averaging under valid conditions, temperature stability and measurements across many levels can still depend on it. It does show that a single noiseless code cannot demonstrate a sub-code input change. Allocate the desired application result before paying for a tolerance that does not address the present dominant limitation.

Check how much of the conversion range the application uses

If the external signal uses only a small part of the designed span, it uses correspondingly fewer ideal codes. In the example, a 1 V-wide external interval spans about 163.84 code widths even though the converter provides 4,096 codes over its full input span. The relevant small-signal discrimination must be judged within that operating interval, not from the full-scale bit count alone.

Changing the divider ratio or adding gain can improve range use but reduces headroom for the maximum normal input and transients. Revisit input protection, amplifier range and connected impedance together. Do not scale the signal to nearly fill the converter while silently discarding valid overshoot or startup states. The equipment owner must define which inputs need accurate measurement and which need safe detection without precision conversion.

Do not assume averaging creates missing code information

A perfectly steady ideal input that remains within one code bin can produce the same code repeatedly. Averaging those identical values does not reveal where the input lies inside the bin. Under appropriate noise or dither and sampling assumptions, code variation can provide additional information, but the resulting resolution and error must be established for the actual measurement process.

Quantization error is not universally independent white noise. Signal amplitude and its relation to sampling can affect that approximation. Keep the observed code histogram, timing and filtering with any claimed improvement. Smoothing also changes response time and can hide short events. A more stable display is not automatically a more accurate or more informative measurement of the customer signal.

Keep settling and calibration outside the code-bin arithmetic

The bin calculation assumes the ADC sees the correct settled divider output when conversion occurs. A high-impedance divider driving a switched sampling input can violate that assumption. Charge sharing and repeated acquisition depletion can shift the analog value before it is quantized. Use the separate acquisition-interface analysis rather than treating that deterministic shift as unavoidable one-code noise.

Calibration can correct supported offset or scale terms but does not make an underresolved or unsettled measurement ideal. Preserve the raw code and the calibration version used to calculate voltage. Avoid repeatedly rounding intermediate values, especially when converting units or applying a ratio correction. The final display should communicate the supported result while the underlying record retains enough information for reconstruction.

Verify transitions and the requested application resolution

Use a suitable independent analog reference to sweep small input changes across representative code transitions. Record raw codes, actual input, converter reference, divider temperature and acquisition sequence. Compare the observed transition locations and code variation with the declared transfer model. Do not identify input resolution solely from a single repeated reading at one convenient voltage.

For a ChipSimple voltage-divider enquiry, provide the external range, required smallest useful change, converter mode and total error budget. The review can then place resistor ratio, impedance and temperature behavior in their proper roles. The handoff should distinguish nominal code width, observed repeatability and validated accuracy so the customer does not mistake a long decimal display for information the hardware never acquired.