Voltage-Gradient Models: Surface Changes after Cleaning or Coating

Define the physical surface path between named nodes

Identify conductors, potential distribution, substrate, protective material, edges, holes, terminals and enclosure. Distinguish air clearance, exposed surface path and solid or coated path. Cleaning residue can bridge only certain regions; coating edges can move the exposed triple interface. Use actual fired geometry and minimum distances, not nominal centre spacing. This page does not derive a safe clearance or voltage from geometry alone.

Add measured surface conduction to the field model

Represent surface current with a conductance appropriate to the controlled condition and retain bulk dielectric response separately. Coating thickness and permittivity alter capacitive field distribution even when steady leakage is low.

Calculate a bounded surface-current example

For illustration, a modeled surface segment has effective conductance 2 nS across its node pair. At 100 V the steady current is 0.2 µA. If a controlled cleaning-residue state raises conductance to 8 nS, current becomes 0.8 µA under the same simplified conditions. These values are not material properties, voltage ratings or acceptance limits. Field concentration at coating edges and time-dependent polarization can require a more detailed model.

Create traceable cleaning and coating specimens

Define cleaning agent, bath loading, rinse, drying, handling and storage. For coating, define material, preparation, print or dispense route, cure or firing, coverage, thickness and rework. Use uncleaned, cleaned, coated and appropriate process-control groups when the question requires separation. Avoid treating visual cleanliness as ionic evidence or color as thickness evidence. Link every electrical specimen to its surface-process genealogy.

Inspect thickness and edges where the model predicts stress

Measure coating over flat substrate, conductor shoulders, corners and termination edges. Locate bubbles, pinholes and exposed regions. Select cross-sections based on field and process risk rather than convenience. Record minimum local thickness with measurement uncertainty. Cleaning validation should sample traps and edges that represent the product geometry. A flat witness coupon may not capture residue beneath terminals or coating over relief.

Validate potential and leakage without confusing fixture paths

Use guarded fixtures, blanks and node-specific currents under an authorized voltage sequence. Control humidity, temperature, ramp, dwell, polarity and recovery. Surface-potential or field probes can perturb the field and require method validation. Compare cleaned and coated states at identical geometry. Record current versus time; a final value can miss charging or progressive wetting. High voltage requires qualified personnel, interlocks and discharge procedures owned by the facility.

Separate residue, coating void and edge concentration patterns

Leakage that follows humidity and cleaning lot can implicate surface contamination. Local discharge or current near a coating edge may reflect geometry or a void. Uniform capacitance change without steady leakage can come from coating dielectric properties. Fixture blanks revealing similar current indicate test-path contamination. Do not add more coating automatically: thick edges, trapped residue or cure stress can worsen another mechanism. Preserve as-found surfaces before cleaning or destructive analysis.

Release surface process and model limits together

Control conductor geometry, coating boundary, thickness, cleaning route, environmental condition, voltage nodes and test method. ChipSimple can review an agreed ceramic thick-film and protective-layer construction; insulation coordination, safe voltage and compliance remain customer-owned. Reopen analysis after changes to cleaner, rinse, coating, cure, firing, conductor layout, voltage waveform, enclosure or humidity. Retain internal provenance and customer-facing claims within verified evidence.

Treat cleaning and coating as changes to the voltage surface

Voltage gradient along a ceramic surface is governed by the actual exposed or coated path, not only conductor separation on artwork. Cleaning can remove flux or ionic residue, but an uncontrolled process may leave moisture, detergent film or altered surface energy. A conformal or protective coating can lengthen an interface path and exclude contamination, yet voids, edge retreat and trapped residue can concentrate the field. Map conductor potentials, exposed ceramic, glaze or coating edges and assembly contacts after the final process state.

Use a path-based review that identifies the shortest credible route between different potentials and from energized features to accessible metal. Divide voltage change by local path length only as a screening metric; geometry near corners, triple points and defects can produce nonuniform fields. Acceptance requires the customer or designated authority to define voltage class, waveform, environment, pollution exposure and applicable safety rules. Do not turn a calculated gradient into a claimed dielectric rating. The test plan should specify conditioning, ramp, duration, leakage method and post-test inspection.

Process validation includes cleanliness evidence before coating, coverage inspection at edges and raised features, cure control and traceable lot information. Compare representative samples before and after environmental conditioning when required. If a coating repair is permitted, define overlap, surface preparation and reinspection because the repair boundary becomes a new interface. RFQ data should include maximum potential differences, conductor map, cleaning chemistry constraints, coating material and thickness intent, assembly environment and governing standard. Reopen review after cleaner, cure, coating, geometry or enclosure changes.

Inspection also needs an explicit rule for coating-edge position near energized features. Measure retreat, overflow, bubbles, pinholes and coverage over raised conductor boundaries using the approved optical setup. Sample locations should follow predicted field concentration rather than convenient open areas. If the surface is handled after cleaning, define time, packaging and allowable exposure before coating. A witness coupon may monitor the route, but the product geometry remains necessary where corners and interfaces control the electrical path. Retain failed specimens for mechanism review instead of classifying every leakage event as a material defect.