Ceramic DAC Output Networks: Separate Hold-Response Droop from DC Gain Error

System boundary

A baseband waveform output using a conventional zero-order-hold DAC, a drawing-defined ceramic resistor network and an analog reconstruction path. Other DAC pulse modes, RF image synthesis and complete converter performance need their own models.

Integration interfaces

Integration risks

Distinguish a settled level from a reconstructed waveform

A DC test holds one code until the complete analog path settles. A sinusoidal output continuously changes codes, so it exercises the time behavior of the converter as well as its static transfer. Record the requested waveform frequency, sample sequence, update event and measurement bandwidth. A meter reading the waveform peak is not necessarily measuring the amplitude of its fundamental component.

Keep the resistor network's role explicit. A static ladder may set code weights, or an output stage may set gain and loading. Neither description establishes the frequency response of the complete source. Measure or calculate the constant network contribution separately from the DAC hold and the reconstruction filter, so a correct passive circuit is not adjusted to compensate for an unrelated time-domain effect.

Use the actual hold period in the response calculation

A conventional zero-order hold retains each converted sample for one update interval. Relative to a unity-DC-gain reconstruction convention, its baseband magnitude is the absolute value of sin(pi f/fs) divided by pi f/fs. Here f is signal frequency and fs is the physical DAC update rate. The magnitude tends to one at DC and falls as the signal occupies a larger fraction of the update rate.

The associated linear phase delay for the ideal rectangular hold is half an update interval. Other DAC output modes may use different pulse shapes, so this model must be matched to the selected device. Do not substitute a host data-transfer rate for fs when the converter interpolates internally. Equally, a fast communications clock does not prove that the output changes at that rate.

Compare two frequencies with the same resistor gain

Assume a converter updates at 100 ksample/s and the downstream static gain is exactly one. At a 10 kHz sinusoid, the hold magnitude is approximately 0.983632, corresponding to about minus 0.143 dB. At 40 kHz it is approximately 0.756827, corresponding to about minus 2.420 dB. These are independently calculated ideal hold values, not performance specifications for a physical converter.

A constant gain of approximately 1.32131 would compensate the 40 kHz hold magnitude at that one frequency. Applied unchanged at DC, it would instead create about 32.13 percent too much gain. This is why trimming one resistor while observing only the high-frequency amplitude can spoil the correct DC calibration. The correction needs a defined frequency dependence or a different update strategy, not a new unexplained DC scale.

Keep amplitude flatness separate from image rejection

Sampled waveform generation also creates spectral images around the update frequency and its multiples. For the assumed 40 kHz output at 100 ksample/s, the first mirrored image is at 60 kHz. The reconstruction path must retain the wanted band while sufficiently suppressing the unwanted image for the receiver. A flat fundamental-amplitude curve alone does not establish that this rejection is adequate.

An equalizer that boosts the wanted upper-band amplitude is not automatically a reconstruction filter. Its behavior outside the wanted band can leave or amplify unwanted content. Define a passband and a rejection requirement together, then evaluate the combined chain. Do not assume that a visibly smooth oscilloscope trace proves the absence of images; display bandwidth and interpolation can make an inadequately filtered waveform look deceptively clean.

Check what a higher update rate actually changes

If the same 40 kHz waveform is generated with a genuine 200 ksample/s update sequence, its hold magnitude becomes approximately 0.935489 and its first image moves to 160 kHz. Both amplitude droop and separation from the wanted band improve in this ideal comparison. The code-generation path, converter settling and analog response must still support the new operating point.

Merely sending each old sample twice to a faster interface does not provide the same waveform as evaluating or interpolating intermediate samples. The output can remain constant for the original total duration, retaining that longer effective hold. Check the actual sample values and physical update events rather than inferring improvement from a configuration label. Keep any interpolation filter's response in the total transfer calculation.

Budget compensation before reaching an amplitude limit

Inverse-response equalization requires more amplitude where the uncompensated response is smaller. For the 40 kHz, 100 ksample/s single-tone example, the ideal amplitude multiplier is approximately 1.32131. A desired code-domain peak already close to the converter's permitted limit cannot receive that multiplier without clipping. Reserve headroom or reduce the specified output amplitude before enabling the compensation.

A multitone or transient waveform needs its actual peak evaluated after filtering; adding the gains of individual tones is not a complete peak analysis. Analog post-equalization also consumes amplifier output swing and bandwidth. Noise, component variation and finite filter order prevent a simple inverse formula from being an unconditional accuracy guarantee. Limit compensation to a declared operating band instead of approaching a response null with an unbounded gain request.

Use paired-rate sweeps to locate the frequency-dependent loss

Measure the fundamental amplitude through the same load and calibrated measurement path at several frequencies and at two supported update rates. Keep the static gain setting unchanged. A response component that moves with f/fs is consistent with the hold model, whereas a fixed analog pole follows absolute frequency. This comparison helps allocate the correction without attributing every rolloff to the ceramic network.

Retain the raw DAC configuration, interpolation state, waveform peak and measurement bandwidth with each sweep. Check DC separately, then inspect relevant images and distortion with appropriate frequency-domain measurement. A changing receiver load or measurement-probe capacitance can alter the analog response and confound the comparison, so preserve those connections. Timing jitter and code-transition glitches remain separate dynamic error mechanisms.

Specify the complete output path for network review

Provide the DAC output mode, effective update rate, wanted frequency band, load and signal amplitude with the resistor network drawing. Identify which stage owns static gain, equalization and image rejection. Include tolerance analysis for the analog response rather than presenting a resistor-ratio tolerance as a guarantee of waveform flatness over an unspecified band.

For a custom thick-film output network, ChipSimple can review the passive topology and drawing-defined interface. The converter and system owners validate dynamic waveform performance. After changing a DAC mode, interpolation configuration, reconstruction filter or output load, repeat the paired DC and frequency-domain checks. This preserves the distinction between a sound resistor network and a complete waveform source that satisfies its intended receiver.