Motor-Drive Signal Interfaces

Motor-Drive Feedback: Finding a Valid Sampling Window between PWM Edges

Allocate switching-edge recovery, analog acquisition and timing uncertainty before accepting low-level resistive feedback near a PWM motor drive.

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Bench-mounted motor beside closed electronics enclosures, a disconnected paired probe and an inactive oscilloscope.
Engineering illustration; not a product photograph or a test result.
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A low-level feedback signal beside a switching motor drive can be correct between edges and disturbed briefly at each transition. Sampling at a repeatable time is not enough unless that time falls within a valid analog interval. The integration task is to relate the actual switching events, front-end recovery and converter acquisition window to each other. A passive resistor network or position card contributes to the signal path, but does not by itself establish that the controller captures usable feedback.

System boundary

An auxiliary low-level resistive network or position-feedback element, its analog front end, converter and synchronization interface near a PWM drive. The power bridge, current-shunt technology, motor control law, isolation and machine protection remain separate scopes. No ordinary printed resistor is asserted to be a released traction-current shunt.

System integration decisions

  • Identify the physical switching events that disturb the selected sensing nodes, not only the PWM timer rollover.
  • Fit the complete acquisition interval between recovery and the next excluded event, including timing uncertainty.
  • Record when no valid window exists; do not silently reuse a sample or call a filtered disturbance a valid measurement.

Name the sensed quantity before selecting a timing strategy

A passive position track, a signal-conditioning resistor network and a power-current shunt serve different functions. Their relation to the motor's switching state is not interchangeable. State the actual measurand and the physical sensing nodes. An angle signal need not follow phase current, while a phase-current measurement may only represent the desired path in particular switching states.

The circuit and control owners select the sensing architecture. This review concerns the interval in which its analog output can be acquired accurately, not a universal preference for low-side, high-side or in-line sensing. Preserve the chosen architecture's observability limits instead of assuming that any quiet voltage between edges represents the quantity the controller needs.

Separate transient recovery from steady common-mode rejection

A switching transition can create a brief error at an amplifier output even when the desired differential signal changes little. The behavior depends on the actual front end and the applied transition. Motor-sensing documentation treats recovery after PWM common-mode events as distinct from normal signal accuracy. A steady-state rejection number does not establish the time needed to recover after that event.

Define recovery against an allocated error band at the node feeding the converter. A visibly small spike on one oscilloscope scale may still exceed that band's requirements. Conversely, an output that looks settled can conceal the wrong gain or a clipped operating state. The observation needs enough resolution and a suitable reference to show that the signal has returned to the intended measurement relationship.

Fit the whole acquisition interval, not only the trigger point

Let one relevant switching event occur at time t0 and the next excluded event occur at t1. If the front end requires recovery time tr after t0, and the converter needs an acquisition interval ta, the usable interval must be long enough to contain both. A trigger inside the quiet region does not suffice if acquisition extends into the next transition.

An elementary timing allocation is t1 − t0 ≥ tr + ta + tm, where tm is a combined allowance for the timing uncertainty and edge exclusion not already included elsewhere. It is a feasibility condition for the stated interval, not a model of the amplifier's recovery. Converter aperture, sample-and-hold behavior and trigger semantics must be translated from the actual hardware documentation before using it.

t1 − t0 ≥ tr + ta + tm

  • t0 and t1: boundaries defined by the relevant physical switching events.
  • tr: demonstrated analog recovery allowance after t0.
  • ta: required converter acquisition interval at the selected configuration.
  • tm: additional timing and edge-exclusion allowance without double counting.

The measurand is observable throughout the remaining interval, no other switching disturbance occurs inside it, and all durations use compatible worst-case or probabilistic conventions.

Check window existence as modulation changes

Changing duty cycle moves switching events relative to each other. An interval that was adequate at one operating point can shrink until it no longer contains the allocated recovery and acquisition. The middle of the nominal PWM period is therefore not a universal sampling location. It must be related to the real edge pattern and sensing architecture.

For illustrative timing only, suppose the interval between relevant events is 8 microseconds, recovery consumes 2 microseconds, acquisition consumes 3 microseconds and the remaining timing allowance is 1 microsecond. There are 2 microseconds of unused allocation. If modulation reduces the interval to 5 microseconds, the same chain no longer fits. None of these values is a device specification or an acceptable motor-control timing recommendation.

Decisions when the switching-relative acquisition window changes
ConditionIntegration questionResponsible owner
Window fits with allocated marginIs the measurand valid throughout that interval?Sensing architecture owner
Window exists only in part of duty rangeHow is the remaining range handled without inventing feedback?Control and timing owners
Recovery varies with transition directionAre both edge directions represented in the allocation?Analog validation owner
Trigger jitter consumes the remaining intervalCan the scheduling uncertainty be reduced or the architecture changed?Timing hardware owner
No qualified sample is availableWhich explicit validity state reaches the controller?Control and safety owners

Relate timer events to the transitions at the sensing nodes

A PWM command is not the same as the switching transition observed in the power circuit. Driver propagation, device behavior and the selected modulation can alter the relationship. The timing interface must identify whether its reference is a software command, gate-drive event or measured electrical transition. A delay budget based on one cannot be silently applied to another.

Also identify disturbances from other legs or nearby switching loads. A window bounded by two edges of one timer may contain another relevant event. Keep a switching-state record that matches the full installed configuration. The analog owner determines which events matter to the sensing path; the firmware owner then implements a schedule against those defined events rather than against a convenient but incomplete timer label.

Verify recovery without changing the return path

A probe connection can introduce a new return path or load the sensitive node. Use measurement equipment and connections appropriate to the voltage and isolation boundary under the qualified drive team's procedure. The measurement should not improve the waveform merely by adding a laboratory ground connection that will not exist in the installed product.

Capture the switching-relative analog trace and the converter observation together where the approved setup permits. This separates front-end recovery from an acquisition problem. The test should retain the measurement bandwidth and averaging settings; averaging repeated traces can conceal timing variation or rare excursions. No live high-power test sequence is prescribed here, and a low-energy surrogate does not establish full drive isolation or fault performance.

Do not use digital smoothness to certify an analog window

If the ADC repeatedly samples a disturbance at nearly the same phase, the resulting error may appear as a stable offset rather than obvious noise. If the relative phase drifts, it can appear as a slow change in position or load. A downstream smoothing filter can make either trace attractive while leaving the acquisition error in place.

Preserve raw values and sample timing when evaluating the window. Digital filter coefficients and their motion-lag trade-off belong to a separate decision after valid analog observations are established. Likewise, faster network delivery does not repair a sample acquired during recovery. Keep analog validity, digital filtering and transport latency as separate allocations in the feedback chain.

Record the operating region for which the window is demonstrated

The final record should identify the sensing architecture, switching pattern, relevant edge range, front-end configuration, acquisition settings and validity policy. Relate accepted records to the physical operating states covered by the validation. A demonstration at one duty cycle or with the motor disconnected does not establish every intended drive state.

Changes to the gate driver, input filter, analog amplifier, converter configuration or modulation strategy can alter the timing relationship even when the passive resistor network is unchanged. Recheck the affected window instead of assigning a new resistor tolerance to compensate. The network supplier contributes its defined electrical interface; the drive and controller owners establish usable feedback and complete-system behavior.

Provide the switching-relative sensing boundary

Share the signal-level circuit and timing allocation without treating a passive resistor as a complete motor-current or safety subsystem.

  • Measurand, sensing nodes, passive circuit drawing, signal range and receiver input configuration.
  • Relevant switching event definitions, modulation states and the relationship between timer commands and physical transitions.
  • Front-end recovery evidence, converter acquisition interval, timing uncertainty and required measurement error band.
  • Sample-valid policy, raw synchronized records and the qualified owners of drive operation, measurement and control acceptance.

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