Overview
A matched resistor network is released by its transfer function across real conditions, not by assigning the same absolute tolerance to every element. Ratio error depends on individual resistance errors and on how material, geometry, terminations, trimming, temperature, power, gradients, aging, and measurement are correlated. Layout and process can preserve common-mode behavior, while the trim and calibration strategy must control differential error without creating fragile current paths or hidden drift.
Engineering review matrix
Each row links a design variable to evidence that can support a drawing or release decision.
| Variable | Control question | Verification route |
|---|---|---|
| Network function and ratio definition | Define the exact input-output relation, node labels, polarity, nominal ratio, allowed error, operating states, and whether limits are initial, calibrated, or life-of-product. | Use one equation and node convention across schematic, drawing, test fixture, software, and acceptance data. |
| Element values and loading | Set absolute resistance values with source impedance, load, bias current, leakage, measurement input, frequency effects, and power distribution visible. | Measure the complete loaded network as well as individual elements where diagnostic separation is needed. |
| Material and process correlation | Define resistor family, sheet-resistance range, substrate, conductor terminations, print orientation, firing or curing, refires, and panel relationship for matched elements. | Use representative within-network, within-panel, and across-lot data to quantify common and differential variation. |
| Geometry correlation | Coordinate aspect ratio, orientation, termination overlap, conductor entry, spacing, edge distance, trim allowance, and neighborhood without copying a nominal shape blindly. | Inspect critical geometry and compare element and ratio response by position and orientation. |
| TCR tracking and thermal gradient | Allocate absolute TCR, differential TCR, element self-heating, substrate gradient, neighboring heat sources, mounting, airflow, and warm-up time. | Measure ratio and element temperatures across the defined temperature and load matrix after stabilization. |
| Voltage and power effects | Account for continuous and transient voltage, power, current density, voltage coefficient, pulse energy, duty, and unequal element dissipation. | Characterize ratio under representative electrical states rather than extrapolating from low-level room-temperature readings. |
| Trim and protection interaction | Define trim order, target, topology, cut placement, remaining path, instrument loading, settling, overglaze or overcoat, and later thermal cycles. | Compare pre-trim, post-trim, post-protection, and delayed ratio data with cut inspection and process records. |
| Stability, calibration, and measurement | Include instrument and fixture uncertainty, contact or lead resistance, calibration, humidity, bias, cycling, assembly, aging, and software correction in the owned budget. | Run a traceable measurement and exposure plan and report raw ratio, correction, residual error, and scope separately. |
Controlled model
Ratio, loading, and tracking model
Fix the node convention before calculating error. Separate the element ratio q from the divider transfer K, include the real load, and distinguish common element movement from differential error caused by TCR mismatch, thermal gradients, loading, trim, leakage, and measurement.
q = R₂ / R₁Defines the resistance ratio for two named elements.
- Units
- Dimensionless; R₁ and R₂ in Ω
- Use boundary
- The element identities, terminals, polarity, measurement loading, and reference condition must be fixed before using q.
δq / q ≈ δR₂ / R₂ − δR₁ / R₁First-order fractional ratio error; common fractional movement cancels while differential movement remains.
- Units
- Dimensionless, commonly reported as % or ppm
- Use boundary
- A small-error linearization. Include covariance, nonlinear behavior, contacts, leakage, loading, and calibration separately when material.
K = V_out / V_in = R₂ / (R₁ + R₂)Ideal unloaded divider transfer when the output is measured across R₂.
- Units
- K dimensionless; V_out and V_in in V; R₁ and R₂ in Ω
- Use boundary
- Assumes negligible source impedance, infinite load impedance, no leakage, and the stated node convention.
δK / K ≈ (1 − K) (δR₂ / R₂ − δR₁ / R₁)First-order relationship between element fractional errors and the unloaded divider-transfer error.
- Units
- Dimensionless, commonly reported as % or ppm
- Use boundary
- Valid for small changes around the nominal unloaded divider. Do not substitute it for the exact loaded transfer or a full uncertainty model.
R₂,L = R₂ ∥ R_L; K_L = R₂,L / (R₁ + R₂,L)Loaded-divider transfer using the parallel combination of the lower element and the load impedance.
- Units
- R₂,L, R₂, R_L, and R₁ in Ω; K_L dimensionless
- Use boundary
- Use the actual input impedance, leakage, frequency dependence, source impedance, and measurement circuit. A nominal open-circuit ratio is not the loaded system result.
Δq / q ≈ (α₂ − α₁) ΔTFirst-order ratio change from differential TCR when both elements experience the same uniform temperature change.
- Units
- Δq/q dimensionless or ppm; α in ppm/K; ΔT in K
- Use boundary
- For a thermal gradient, treat the element temperatures separately, for example α₂ΔT₂ − α₁ΔT₁, and include self-heating, nonlinearity, hysteresis, and drift.
Decision comparison
| Decision | Route A | Route B | Verification |
|---|---|---|---|
| Absolute element accuracy versus ratio accuracy | Absolute values control input impedance, loading, power, voltage distribution, and interaction with the source and measurement system. | Ratio performance is dominated by differential element errors and correlations, not by equal absolute tolerances alone. | Measure individual elements and the complete loaded transfer at the same reference conditions and retain both results. |
| Common temperature versus thermal gradient | A shared uniform temperature can allow similar element changes to cancel in the ratio when differential TCR is controlled. | Unequal self-heating or a substrate gradient gives each element a different temperature and creates differential ratio error. | Measure ratio and element or local temperatures across the defined load, warm-up, ambient, and mounting matrix. |
- Use one node and sign convention across schematic, drawing, fixture, data analysis, and acceptance record.
- System calibration may remove an initial offset but must not conceal unstable physical tracking, loading, or drift.
Ratio-matching design workflow
The order makes assumptions and ownership visible before a result is promoted to a requirement.
- 01
Define the transfer function
Specify the ratio or output equation, element nodes and nominal values, source and load impedances, reference temperature, common-mode and differential voltage, power, frequency if relevant, and complete error budget.
- 02
Build the ratio-error model
For a simple ratio, relate fractional ratio error to the differential fractional errors of its elements, then add loading, leakage, terminal, measurement, and calibration terms. Keep exact and linearized equations within their valid assumptions.
- 03
Design for correlated behavior
Place matched elements to share material family, firing history, orientation, geometry style, substrate temperature, protection, and environmental exposure while controlling gradients, current crowding, coupling, and isolation.
- 04
Plan trim and calibration
Choose which elements or features are adjustable, pre-trim targets, trim sequence, measurement loading, stopping rule, cut geometry, post-trim protection, settling, and whether system calibration consumes part of the error budget.
- 05
Validate ratio over use conditions
Measure absolute values and ratio at defined temperatures, voltages, loads, directions, times, and environmental stages. Separate common-mode movement from differential error and release only the tested network construction and method.
Failure controls
These are review prompts, not evidence that every risk applies or that every test is available.
- A
Specifying tight absolute tolerances while leaving the actual ratio, loading, and transfer function ambiguous
- B
Assuming elements track because they share a paste name while geometry, position, terminations, temperature, or processing differ
- C
Ignoring source and load impedance, leakage, probe contacts, or measurement-system error in the ratio result
- D
Using trim to reach the initial ratio while creating a narrow hot path, unequal stress, or poor long-term tracking
- E
Measuring at one uniform temperature while the powered assembly creates differential self-heating or a substrate gradient
- F
Combining correlated and independent errors incorrectly or allowing calibration to hide an unstable physical network
Reference boundary
Public method sources
These sources support the engineering method and terminology used in this technical guide. They do not establish a ThickFilmPCB material list, capability limit, customer result, certification, or finished-product specification.
- 01IEC 60115-6-1:1983 — blank detail specification for equal-value, equal-dissipation resistor networks
Supports the style, layout, and minimum-content structure of a blank detail specification for individually measurable resistors of equal value and equal dissipation only. Its stated scope does not define an unequal-value divider or project ratio requirement and proves no ChipSimple matching, tracking, trim, or stability performance.
- 02Vishay — Precision Thin Film Technology (thin-film terminology reference)
Provides a thin-film terminology and circuit-analysis analogy for absolute resistance, ratio tolerance, TCR tracking, voltage-ratio tracking, and lead-resistance effects only. It is not primary evidence for thick-film mechanisms and cannot be used as thick-film or ChipSimple performance evidence.
- 03NIST Technical Note 1297 — Evaluating and expressing measurement uncertainty
Supports identifying, propagating, and reporting measurement-uncertainty components in a ratio model only; it provides no network performance value and does not prove assumed correlation or independence.
- 04Heraeus — R8900 Series air-fired resistor system technical data sheet
Supports treating resistor family, sheet-resistance range, TCR, geometry, terminations, firing, and test conditions as linked inputs for one named thick-film system; supplier typical values are not a ratio guarantee or ChipSimple capability.
Inputs for a practical review
Unknown values may be labelled unknown. The review should convert uncertainty into an explicit decision or validation task.
Send Drawings- 01
Schematic and transfer equation with node names, nominal ratio, element values, polarity, and total error allocation
- 02
Source, load, measurement input, leakage, common-mode and differential voltage, current, power, pulse, and duty
- 03
Reference and operating temperatures, warm-up, thermal gradient, mounting, nearby heat sources, airflow, and ambient
- 04
Substrate, conductor, resistor material-system requirements, geometry, orientation, protection, and assembly stack
- 05
Absolute tolerance, ratio tolerance, TCR and tracking, voltage effect, noise, stability, calibration, and life criteria
- 06
Trim access, sequence, target, test fixture, instrument method, data format, sampling, and acceptance rule
- 07
Prototype and production quantities, environmental validation, traceability, change control, and required records