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A fired thick-film conductor is a processed printed film, not a copper foil trace laminated to FR4. Its material state, thickness distribution, edge profile, terminations, refires, underlying ceramic and heat path differ. An FR4 trace-width chart therefore cannot release a ceramic conductor. The correct workflow starts with the current waveform and permissible loss, uses measured processed-film data for a first geometry model, then validates voltage drop and temperature in the representative stack. This page owns current-path selection; multilayer routing, ground-return partition and conductor-material choice remain separate owners.
For a drawing-specific part, review the Custom thick film ceramic circuits construction, product evidence and quotation inputs alongside this method. Prepare the dfm checklist with your operating conditions.
Key design decisions
- Define current waveform, duty, fault state and allowable path loss before drawing width.
- Use processed sheet resistance and effective geometry, not copper thickness assumptions.
- Include necks, turns, overlaps, terminals and transitions as distinct segments.
- Validate the finished path in its real thermal and assembly boundary.
1. Define the electrical job of each conductor
Classify each net as continuous power, pulsed load, heater feed, low-level signal, resistor termination, sense connection, shield, ground return or temporary test path. Record RMS, average and peak current with waveform and duration. A short pulse can be limited by local heating or interface stress even when average current is small. A measurement path may carry little current yet require strict voltage-error control.
State permissible end-to-end voltage drop, local temperature rise, interaction with neighboring features and behavior under fault or startup. Identify who owns protective-device coordination. Do not assign a current rating to a width before the substrate mounting, ambient, cooling and allowable temperature are known. The circuit drawing should distinguish verified requirements from planning assumptions and from values that remain subject to application review.
2. Describe the conductor as a processed film
Name the conductor system and its relevant fired sequence only when supported by the project material record. Sheet resistance depends on paste, printed deposit, drying, firing, substrate, underlying and overlying layers, refires and measurement temperature. Supplier typical data can help create a trial, but it is not a guaranteed value for a different geometry or process. Measure representative films using a stated method and retain lot and firing identity.
Do not substitute bulk resistivity of silver or a copper-foil thickness. Printed films can have nonuniform edges, local topography and interfaces that dominate a short path. A glass overglaze can change heat transfer and blocks direct thickness observation. Where thickness matters, define how the effective electrical section is established rather than turning a surface profile into an assumed dense rectangular conductor.
3. Use square count as a transparent first estimate
For a uniform rectangular section, estimate Rsegment = Rs × L/W. L and W use the same units, so their ratio is the number of squares. Sum segments and add measured contributions from vias, crossovers, terminations, bonds, solder joints or connector contacts. The estimate should use effective fired dimensions, not only screen artwork. Turns and spreading regions require either an appropriate model or representative measurement.
For illustration, a 28 mm segment with 0.70 mm effective width contains 40 squares. With an assumed processed sheet resistance of 6 milliohms per square, its estimated resistance is 0.24 ohm. At 0.50 ampere, the path drop is 0.12 volt and electrical loss is 0.060 watt. These selected numbers demonstrate method and units only. They do not establish a safe temperature because the thermal resistance to the surroundings remains unspecified.
Rpath = sum(Rs,i × Li/Wi) + sum(Rinterface,j); Ploss = Irms^2 × Rpath
- Rs,i is measured processed sheet resistance for segment i.
- Li/Wi is effective square count for that segment.
- Rinterface,j covers transitions and attachments not represented by square count.
- Irms is current appropriate to the heating calculation.
Uniform segment approximation at a stated temperature; local thickness, current crowding and thermal boundaries need validation.
4. Treat necks, corners and overlaps as local structures
Map the minimum effective width through every terminal neck, pad exit, turn, crossover landing and via capture region. A broad main run does not protect a narrow connection. Avoid abrupt width changes where possible within the drawing constraints, and keep conductor edges away from holes, singulation zones and unsupported corners according to project-specific evidence. The smallest local section and its thermal environment can govern the path.
Current crowding at inside corners and spreading into pads mean a centerline length calculation is incomplete. Overlaps with resistors or other conductors introduce material interfaces and firing interactions. Keep those design questions with their appropriate material and process evidence rather than applying an FR4 teardrop or via rule by analogy. When a local model is uncertain, create a coupon reproducing the geometry and adjacent stack, including glaze if it affects heat extraction.
5. Evaluate heat where the ceramic is actually mounted
Joule loss becomes temperature rise through conduction into the ceramic, spreading, mounting interfaces, convection and radiation. A high-conductivity substrate can spread heat but cannot compensate for a poor interface or an insulated enclosure. Identify support points, contact pressure, heat sink, nearby heat loads, ambient or fluid, duty cycle and transient duration. Do not infer component temperature from a remote substrate measurement.
Use coupled thermal analysis or measured assemblies appropriate to consequence. Preserve emissivity and sensor-attachment assumptions when using thermal imaging. A thermocouple can change a small printed feature's local heat path, while an infrared reading can be biased by different surface finishes. Compare methods or calibrate the observation for the actual surfaces when temperature is part of acceptance. Keep electrical resistance measured at the relevant temperature because resistance may change during operation.
6. Replace borrowed rules with a project input table
An FR4 chart commonly assumes a copper thickness, board construction and specified temperature-rise model. A ceramic thick-film path needs different inputs. Document the origin of every electrical and thermal value. If processed-film resistance or interface loss is unknown, mark it as a trial variable. The absence of a universal width table is useful: it prevents a visually plausible trace from acquiring unsupported capacity.
Apply the table to each critical net, not only the widest power conductor. Sense routes need sharing and return-point review; heater feeds need current balance; pulsed nets need waveform and local thermal response; terminals need attachment exposure. The output is a candidate geometry plus evidence plan, not a catalog current rating.
| Design input | Thick-film definition | Evidence or control |
|---|---|---|
| Conductor resistance | Processed sheet resistance and effective fired geometry | Representative coupon and path measurement |
| Interfaces | Vias, overlaps, bonds, solder and contacts | Segmented voltage-drop test |
| Current | RMS, peak, duty and fault waveform | System electrical requirement |
| Thermal boundary | Ceramic, mount, cooling, ambient and neighbors | Representative assembly measurement/model |
| Acceptance | Drop, temperature and physical-condition limits | Drawing and validation plan |
7. Validate with segmented voltage and temperature evidence
Build representative paths with the intended substrate, conductor sequence, terminations, overglaze and assembly interfaces. Place sense points so main segments, necks and attachments can be separated. Apply defined current states while measuring voltage drop and relevant temperatures with synchronized time. Include geometry near the drawing limits and an unloaded or low-current control when thermal drift could affect the measurement.
A voltage gradient proportional to length along a uniform run supports a distributed-resistance explanation. A concentrated drop at a terminal or via directs investigation to that interface. Local heating at a neck with normal upstream drop suggests geometric concentration or thermal isolation. Broad temperature rise without a matching electrical anomaly may originate in the mounting boundary or a nearby heat source. If results change after probe repositioning, verify contact error before changing artwork.
8. Release the path with its electrical and thermal boundaries
The release package should identify processed conductor system, effective dimensions, stack and firing state, current waveforms, interface constructions, calculated segment model, test locations and representative thermal boundary. Changes to paste, refire sequence, substrate, glaze, route geometry, terminal, face transition, mount, cooling or current reopen the affected evidence. Preserve raw measurements rather than only a declared pass result.
For quotation, provide artwork and mechanical assembly together with current by net, allowed drop, operating states, fault protection, cooling, environment and tests. Highlight widths that are fixed by the system and those open to engineering review. This allows a manufacturability and validation proposal without claiming that a copper design rule transfers to ceramic or that one test coupon proves every future layout.
Send the thick-film current-path package
Provide the electrical waveform, processed conductor assumptions and mounting boundary needed to review the actual route.
- Artwork with critical net and local neck annotations
- RMS, peak, duty, transient and fault current by net
- Allowable voltage drop, temperature and measurement conditions
- Substrate, conductor, firing/refire and glaze stack
- Vias, crossovers, terminals, bonds, solder and connector interfaces
- Mechanical mount, cooling, ambient, prototype quantities and acceptance owner
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